MateuVillaret Auselle

Professor Agregat

Departament d'Informàtica, Matemàtica Aplicada i Estadística

Universitat de Girona

Spain


A bit about my research

My research interest has always been involved with logics in Computer Science. From automated deduction, namely variants and fragments of higher-order unification and anti-unification, till Constraint Satisfaction Problems solving, either declarative modelizations or logic based (SMT or SAT) encodings.

 
Girona, 12/05/2014